- Gate model/value heuristic output behind --verbose/-v flag (quiet by default) - Add wireviz>=0.4 as dev dependency for roundtrip render tests - Generate SVG/PNG diagram renders for inter_module, single_module, hierarchical - Embed rendered diagrams in README with layout optimization callout |
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| .. | ||
| hierarchical.yml | ||
| inter_module.yml | ||
| single_module.yml | ||