Fix linting issues and ground/power filtering in inter-module mapper

- Use CalVer dot notation (2026.2.13) for PEP 440 compliance
- Filter pinlabels for top-level components when ground/power hidden
- Fix unused variables, long lines, import ordering (ruff clean)
- Use StrEnum for PinDirection (Python 3.11+)
- Add .gitignore and README.md
- All 105 tests pass including WireViz roundtrip validation
This commit is contained in:
Ryan Malloy 2026-02-13 01:27:45 -07:00
parent e20a956f51
commit eb3ad60bd1
13 changed files with 1250 additions and 38 deletions

View file

@ -14,7 +14,7 @@ class TestCLIBasic:
runner = CliRunner()
result = runner.invoke(main, ["--version"])
assert result.exit_code == 0
assert "2026-02-13" in result.output
assert "2026.2.13" in result.output
def test_list_subcircuits(self):
runner = CliRunner()