warehack.ing/spice2wireviz
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Fix linting issues and ground/power filtering in inter-module mapper

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- Use CalVer dot notation (2026.2.13) for PEP 440 compliance
- Filter pinlabels for top-level components when ground/power hidden
- Fix unused variables, long lines, import ordering (ruff clean)
- Use StrEnum for PinDirection (Python 3.11+)
- Add .gitignore and README.md
- All 105 tests pass including WireViz roundtrip validation
This commit is contained in:
Ryan Malloy 2026-02-13 01:27:45 -07:00
parent e20a956f51
commit eb3ad60bd1
13 changed files with 1250 additions and 38 deletions
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pyproject.toml
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@ -4,7 +4,7 @@ build-backend = "hatchling.build"
[project]
name = "spice2wireviz"
version = "2026-02-13"
version = "2026.2.13"
description = "Convert LTspice SPICE netlists to WireViz wiring diagrams"
authors = [{name = "Ryan Malloy", email = "ryan@supported.systems"}]
requires-python = ">=3.11"