Initial project structure for spice2wireviz
SPICE netlist to WireViz YAML converter with: - Custom lightweight netlist parser (.net/.cir/.sp) - Single-module mapper (subcircuit external interface) - Inter-module mapper (multi-board wiring) - Filter engine with glob patterns - Click CLI with auto-detection, inspection commands - Optional .asc parser via spicelib - Comprehensive test suite with fixtures
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tests/fixtures/multi_board.net
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* Multi-board system: power supply, amplifier, and I/O board
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* Demonstrates inter-module wiring
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.subckt power_supply VCC GND
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J1 AC_IN AC_GND AC_INLET
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.ends power_supply
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.subckt amplifier VIN GND VOUT
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R1 VIN N001 10k
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C1 N001 GND 100n
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J1 VIN GND INPUT_CONN
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TP1 VOUT
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.ends amplifier
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.subckt io_board SIG_IN SIG_OUT GND CTRL
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J1 SIG_IN SIG_OUT DB9_CONN
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J2 CTRL GND CTRL_CONN
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.ends io_board
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* Top-level instantiation
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X1 VCC GND power_supply
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X2 VCC GND AUDIO_OUT amplifier
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X3 AUDIO_OUT CTRL_SIG GND ENABLE io_board
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* Top-level connectors
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J_CHASSIS GND EARTH chassis_gnd
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TP_VCC VCC
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