Add Sugiyama-lite layout optimization for inter-module diagrams

Layered graph drawing approach to minimize cable crossings:
- Layer assignment via BFS from external connectors (J*, TP*, P*)
- Barycenter ordering (forward + backward sweep) within each layer
- Connection orientation: earlier connector always on the left
- Pin reordering: weighted average neighbor position groups pins
  by destination, reducing within-connector crossings
- Connection sorting: shorter (adjacent-pair) connections first

Fixes from Apollo safety review:
- Explicit ValueError on pin remapping failures (was silent KeyError)
- Weighted pin averaging for star topology (GND shared across modules)
- Fully deterministic sort keys for reproducible output
- Documented closure capture pattern in loop sort keys

examples/inter_module.yml

@@ -0,0 +1,93 @@
+metadata:
+  title: 'Wiring diagram: multi_board'
+  source: tests/fixtures/multi_board.net
+  generator: spice2wireviz 2026.2.13
+connectors:
+  J_CHASSIS:
+    type: chassis_gnd
+    pinlabels:
+    - EARTH
+    - GND
+    notes: 'SPICE ref: J_CHASSIS'
+  TP_VCC:
+    type: TP
+    style: simple
+    pinlabels:
+    - VCC
+    notes: 'SPICE ref: TP_VCC'
+  X1:
+    type: power_supply
+    pinlabels:
+    - VCC
+    - GND
+    notes: 'SPICE instance: X1 (power_supply)'
+  X2:
+    type: amplifier
+    pinlabels:
+    - VIN
+    - GND
+    - VOUT
+    notes: 'SPICE instance: X2 (amplifier)'
+  X3:
+    type: io_board
+    pinlabels:
+    - GND
+    - SIG_IN
+    - SIG_OUT
+    - CTRL
+    notes: 'SPICE instance: X3 (io_board)'
+cables:
+  W1:
+    colors:
+    - BK
+    wirelabels:
+    - GND
+    notes: 'Net: GND'
+  W3:
+    colors:
+    - RD
+    wirelabels:
+    - VCC
+    notes: 'Net: VCC'
+  W5:
+    category: bundle
+    colors:
+    - BK
+    - RD
+    wirelabels:
+    - GND
+    - VCC
+    notes: 'Nets: GND, VCC'
+  W6:
+    colors:
+    - BK
+    wirelabels:
+    - GND
+    notes: 'Net: GND'
+  W8:
+    wirecount: 1
+    wirelabels:
+    - AUDIO_OUT
+    notes: 'Net: AUDIO_OUT'
+connections:
+- - TP_VCC: 1
+  - W3: 1
+  - X1: 1
+- - X1:
+    - 2
+    - 1
+  - W5:
+    - 1
+    - 2
+  - X2:
+    - 2
+    - 1
+- - X2: 3
+  - W8: 1
+  - X3: 2
+- - J_CHASSIS: 2
+  - W1: 1
+  - X1: 2
+- - X1: 2
+  - W6: 1
+  - X3: 1